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    Multi-Chip and Multi-Layer 
      2010-05-05
     
   

We are looking forward to making your creative ideas come true. For the design and production of custom modules with Zowie sophisticated SuperChip assembly technology , please contact us at http://www.zowie.com.tw/contact.php , or call us at +886-2-22195533#105.

Multi-Chip SuperChip Structure

 

‧Design Structure
SuperChip structure not only can do multi-layer design but also can per customer request or application to integrated with varied chips or components, this multi-chip design can do common industrial packing and also customer design. Below picture is 4 GPRC chips pack in bridge packing.


‧ Example:Bridge & TVS Combo design

‧Transient protection Device


‧ Example:TVS Array

Multi-Layer SuperChip Structure

‧Multi-Layer Design
This diagram shows the two-layer structure with two dies sandwiched between three layers of PCB substrate (FR-5). For each additional die added, there will always be one more layer of PCB substrates than the total number of dies.

‧ Diagram: Schottky Diode
This diagram illustrates the multi-layer design with two Schottky dies in 2010 (SMA equivalent) package. If each Schottky die is 3A 40V (60mil), with parallel connection the finished diode will then have capability of 6A 40V.

‧ Diagram: PTC
This diagram illustrates the multi-layer design with two PTC dies in 2010 (SMA equivalent) package. Each PTC die can have the maximum dimension of 3.0mm * 1.7mm * 0.3mm. With parallel connection, the finished product will have twice the hold current capability than the single die.

‧ Diagram: High Voltage Rectifier

—10KV high voltage rectifier in 1206 package with series connection


Package size:
8.0mm × 3.4mm
 




     
   
   
     
   
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